COMPUTER ORGANISATION III B.Tech I Semester Supplimentary Examinations, February 2008 question bank JNTU unerviersity Jawaharlal Nehru Technological University Hyderabad

COMPUTER ORGANISATION III B.Tech I Semester Supplimentary Examinations, February 2008 question bank JNTU unerviersity Jawaharlal Nehru Technological University Hyderabad

COMPUTER ORGANISATION III B.Tech I Semester Supplimentary Examinations, February 2008 question bank JNTU unerviersity Jawaharlal Nehru Technological University Hyderabad

III B.Tech I Semester Supplimentary Examinations, February 2008

COMPUTER ORGANISATION

( Common to Electrical & Electronic Engineering, Electronics &

Communication Engineering, Electronics & Instrumentation Engineering,

Electronics & Control Engineering and Electronics & Telematics)

Time: 3 hours Max Marks: 80

Answer any FIVE Questions

All Questions carry equal marks

1. (a) Explain about sign magnitude and 2’s complement approaches for representing
the fixed point numbers. Why 2’s complement is preferable.
(b) Give means to identify whether or not an overflow has occurred in 2s comple-
ment addition or subtraction operations. Take one example for each possible
situation and explain. Assume 4 bit registers.
(c) Distinguish between tightly coupled microprocessors and tightly coupled Mi-
croprocessors. [16]
2. (a) Explain about stack organization used in processors. What do you understand
by register stack and memory stack? [10]
(b) Explain how X=(A+B)/(A-B) is evaluated in a stack based computer. [6]
3. (a) Support or oppose the statement. The control unit is a firmware? [8]
(b) Support or oppose the statement. If we want to add a new machine language
instruction to a processors instruction set, simply write a C program and
compile and store the resultant code in control memory. [8]
4. (a) How many bits are needed to store the result addition, subtraction, multipli-
cation and division of two n-bit unsigned numbers. Prove. [8]
(b) What is overflow and underflow? What is the reason? If the computer is
considered as infinite system do we still have these problems. [8]
5. (a) Explain how the Bit Cells are organized in a Memory Chip. [8]
(b) Explain the organization of a 1K x 1 Memory with a neat sketch. [8]
6. What are the different kinds of I/O Communication techniques? What are the
relative advantages and disadvantages? Compare and contrast all techniques. [16]
7. Explain the following with related to the Instruction Pipeline
(a) Pipeline conflicts
(b) Data dependency
(c) Hardware interlocks
(d) Operand forwarding
(e) Delayed load
1 of 2
(f) Pre-fetch target instruction
(g) Branch target buffer
(h) Delayed branch. [8×2=16]
8. (a) What are the different physical forms available to establish an inter-connection
network? Give the summary of those. [6]
(b) Explain time-shared common bus Organization. [5]
(c) Explain system bus structure for multiprocessors. [5]